Synopsys Intern Interview Questions Part 1

Q1. Find the gray code for binary number 0100.

• 0110

Q2. Which gate is used for == operation.

• XNOR gate is used for equality check.

Q3. How many flip flops required to design a counter that counts 0, 1, 2…24?

• Number of flip flop required is 5.

Q4. Find the expression using k map (1, 3, 6, 9, 15).

Q5. Which logic has lowest power dissipation?

• CMOS

Q6. What is complemented output for below circuit?

• Complemented output of the circuit is AND gate.

Q7. Write Verilog code for 8 x 1 mux.

·         module mux(Y,In,S);

     input [7:0]In;

     input[2:0]S;

     output reg Y;

     always @(*)

     begin

     case(S)

     3'b000 : Y =In[0];

     3'b001 : Y =In[1];

     3'b010 : Y =In[2];

     3'b011 : Y =In[3];

     3'b100 : Y =In[4];

     3'b101 : Y =In[5];

     3'b110 : Y =In[6];

     3'b111 : Y=In[7];

     endcase

     end

     endmodule

Q8. If a number is shifted right then it will be

A)   Multiplied by 2

B)Divided by 2

C)XOR with 2

D)None

• Answer is B.

Q9. How many 1 x 16 demux required to design 1 x 256 demux?

• 17

Q10. In a 8 bit SIPO shift register if the each bit taking 10ns then how much time is required to get the output.

• 80ns

Q11. What is output of a and b?

          assign a==1;

          assign a==0;

          initial begin

          b<=1;

         b<=0;

         end

• Output of a is syntax error,we can not use == in assign statement.
• Output of b is 0 because it is non-blocking assignment in non-blocking assignment last updated value will be the output.

Q12. The gates G₁ and G₂ in figure have propagation delays of 10nsec and 20nsec respectively. If the input V_I makes an abrupt change from logic 0 to 1 at time t = t₀, then the output waveform V₀ is.

Q13. The present output Qn of an edge triggered JK flip-flop is logic 0. If J=1, then Qn+1.

• ·    Will be logic 1.

Q14. The number of Boolean functions that can be generated by n variable is equal to.

     Q15. For a binary half-subtractor having two inputs A and B, the correct set of Logical expressions for the output D =A- B and X=Borrow are.

•   D = A’B + AB’ , X = A’B

Q16. How to run Perl script?

• perl filename.pl

Q17. Identify the given logic.

• D flip flop

Q18. Difference between blocking and non-blocking assignment in Verilog?

Q19. Write a Verilog code for synchronous and asynchronous reset?

Q20. Difference between $monitor, $display and $strobe

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vlsi4freshers

Hi I’m Designer of this blog.