How to get into EDA/VLSI industry?

I'm writing this post for freshers who want to start their career in VLSI or core industry.
What should I learn to start with VLSI?
Digital Electronics/VLSI design basic/Verilog HDL and Analog Electronics and EDC and some basic knowledge of programming languages like C/C++ and Perl/Tcl. These topics you might have already learnt in B.tech.
Is this enough to crack an interview? No don’t worry lets see why it is not enough so that you will get better idea.
First you should understand that there are many categories or profile available in VLSI:
Front End Design
1. RTL Design
2. Design Verification
3. FPGA Prototyping and emulation
4. DFT Profile
Backend Design
1. Physical Design
2. Layout Design
3. Physical Verification
4. STA Profile
Now the question is what should I learn?
Answer is It's depends on your interest.
For RTL Design: 
  • The basic stuff like EDC/digital/VLSI flow and apart from this for an RTL engineer the expectation is to have good knowledge on Verilog, so learn Verilog in depth.Knowledge of FPGA based simulation.You can do practice on Xilinx Vivado tool. 
For Verification Profile:  
  • The basic stuff like EDC/digital/VLSI flow and apart from this for a Verification engineer languages like System Verilog and Verification Methodology like UVM/OVM and C/C++ and OOPS concept. Learn basics of any one language. You can learn System Verilog from book by Chris Spear and you can learn UVM from verification academy website.
For DFT Profile:
  • If you are interested in DFT profile you should have good understanding of fault models, fault coverage, ATPG, scan insertion techniques, Memory BIST and Logic BIST, JTAG (Boundary Scan), Compression. Familiar with any one industry standard EDA tool Encounter Test by Cadence and TetraMax by Synopsys and DFT compiler by Synopsys.
For Analog Design Profile: 
  • If you are interested in analog design profile you should have good knowledge of Analog concepts like OPAMP and Oscillators and depth understanding of BJT and Mosfet not just the theory expectation here is you should be able to design using CMOS.
For Physical Design Profile: 
  • If you are interested in physical design profile you should have knowledge of physical design flow. You should have knowledge of Placement and Routing and floor planning and CTS (clock tree synthesis) and STA checks and Physical verification –DRC, LVS checks and parasitic extraction. Familiar with any one industry standard EDA tool –Synopsys IC compiler. There are many other tools that will be used in the industry.
For Layout Design Profile:
  • If you are interested in layout design profile if you have knowledge of digital design and analog circuit design using CMOS and basic terms of CMOS, NMOS, PMOS and stick diagram and basic knowledge of IC fabrication steps. Familiar with layout design EDA tool Cadence Virtuoso.
For STA Profile:
  • If you are interested in STA profile if you have knowledge of digital design and set up and hold time concept and STA  checks and analysis of timing path in design. Knowledge of input and output file of STA –SDF (Standard delay format),SDC (Synopsys design constraints) and SPEF (standard parasitic exchange format)and gate level netlist,timing libraries and other concept like noise analysis and signal integrity and AOCV/OCV (on chip variation).Knowledge of any scripting language like Tcl/Perl. Familiar with any one industry STA tool- Primetime by Synopsys. You can also do practice using Opentimer tool.
Front-end or back-end which one I should choose
It’s up to you.
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vlsi4freshers

Hi I’m Designer of this blog.

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