***Intel hiring Pre-Si Verification Intern***
Location: Bangalore 
Job Description
Responsibilities may be quite diverse of a technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school.
Good understanding of Digital Design and VLSI flows and methods. Understanding of RTL coding with VHDL, Verilog, System Verilog and basics of Design verification with System Verilog and understanding of UVM

***Cadence hiring Intern-Design Engineering***
Location: Bangalore 

Position Requirements:

Fresh Engineering graduate in electronics or Comp Science

Very good digital/analog skills

Strong analysis and problem solving skills

Excellent algorithmic skills

Team Player

Strong ability and passion to learn

Excellent verbal and written communication skills

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