Placement Interview Questions

1.What are the inputs and outputs for placement stages?
2.What are the goals of Placement?
3.What are the things to be checked before placement stage?
4.Define placement in physical design?
5.How to qualify the Placement stage?
6.What is Scan chain reordering?
7.What is Scan chain and why this is required in design?
8.What is Lockup latch in scan chain and why this is required?
9.How will you solve routing congestion?
10.During placement stage how tool will know that your design is getting congestion without doing the actual route?
11.How to modify physical constraints to reduce the congestion?
12.What is magnet placement?
13.How do you used blockages techniques to effectively reduce congestion?
14.What are the types of placement?
15.After floorplan DEF is generated as input of placement stage what it contains?
16.How will you solve the congestion when utilization and cell density is more?
17.Where do you find major congestion in your design?
18.How to tackle cell density issue?
19.What are the switches in place_opt command and how they are useful?
20.What are the power dissipation components? How do you reduce them?
21.What is tile?
22.What happens if you over do keepout margin?
23.What is HFN synthesis why we do it in placement stage?
24.Can we consider clock in HFN during placement stages?
25.How will you check your timing report? What are the things you will look into it in case of timing violation?
Go through the given link for answers:
SHARE

vlsi4freshers

Hi I’m Designer of this blog.

    Blogger Comment
    Facebook Comment

0 comments:

Post a Comment