CMOS Inverter Design Using Cadence Virtuoso

 Introduction The objective of this post session is to familiar with the Cadence CAD tools using Virtuoso Schematic entry and its Spectre Si...

CMOS Interview Questions Part 6

Q1. How the transfer characteristic of a CMOS NAND gate is affected with increase in fan-in? Ans: Transfer characteristic does not remai...

CMOS Interview Questions Part 5

1. Estimate rising and falling prorogation delays of a 2-input NAND driving „h‟ identical gates using Elmore Delay a) Rising = (6 + 4h)R...

MOSFET Interview Questions Part 2

These type of questions asked in written test or online test of product and service based companies like synopsys, nvidia, cadence, nxp, me...

CMOS QUIZ

1. In a CMOS circuit, if the frequency of operation is doubled, the power supply voltage is divided by 2, and load capacitance is increase...

CMOS Interview Questions Part 4

1.  The logic function implemented by the given combinational  circuit.  2.  The output voltage of given circuit is. a)    VDD...

Low Power Design Techniques

If you recall in our last post  we discuss about the different sources of power dissipation in CMOS circuits.In this  post we shall be sta...