Floor Planning and Power Planning Interview Questions

Q1. What is Floor planning?

Q2. What is Aspect ratio?

Q3. What is core utilization?

Q4. What is placement blockage? What are the different types of placement blockages?

Q5. How to reduce congestion?

Q6. What is Power planning?

Q7. What are the inputs required for floor planning? 

Q8. What are the floor planning control parameters?

Q9. What are Goals of floor planning?

Q10. What are the outputs of floor planning?

Q11. What are fly lines?

Q12. What are the standard cell rows?

Q13. Explain netlist to GDSII flow?

Q14. What are decap cells and what is the purpose of decap cells?

Q15. What are tie high and tie low cells and where it is used?

Q16. What is the need for sanity checks?

Q17. What is net delay and cell delay?

Q18. What is Halo?

Q19. Why power stripes routed in the top metal layers?

Q20. What is difference between soft macros and hard macros?

Q21. What is partial floorplan?

Q22. What are tie high and tie low cells and where it is used?

Q23. How many macros in your design?

Q24. How did you do power planning?
Q25. How to find total power in chip?

Q26. What is congestion?

Q27. What is IR drop?

Q28. How IR drop affects setup and hold timing?

Q29. How to find out the minimum spacing between two macros?

Q30. What is the difference between core filler cells and metal filler cells?

Q31. What does SDC file contains?

Q32. What is ESD?

Q33. What is Electromigration(EM)?

Q34. How to find number of power pads and IO power pad?

Q35. How do you calculate the core ring width?

Q36. What are the inputs required for power planning?

Q37. What is the need of UPF and what are the contents in UPF?

Q38. What are low power techniques?

Q39. What is power gating?

Q40. How the numbers of power straps calculate?

Q41. What are the checks after power planning is completed?

Q42. How to calculate core ring width, macro ring width and straps or trunk width?

Q43. How is macro placement done in floor planning?

Q44.  What are the guidelines for macro placement?

Q45. How can you say a floor plan is good?

Q46. How to reduce power/ground bounce?

Q47. During power analysis if you are facing IR drop problem then how did you avoid that problem?

Q48. What are the step to minimize Electromigration?

Q49. Which metal should we use for power and ground rings & straps and why?

Q50. What is isolations cells and its types?
Go through all post given in below link for answers:
https://www.vlsi4freshers.com/search/label/Physical%20Design

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Hi I’m Designer of this blog.