**Q1. In the sequential circuit shown below,if the initial value of the output Q1Q0 is 00,what are the next four values of Q1Q0?**

A) 11, 10, 01, 00

B) 10,11,01, 00

C) 10, 00, 01, 11

D) 11, 10, 00, 01

**Q2. Let k = 2n. A circuit is built by giving the output of an n-bit binary counter as input to an n-to-2n bit decoder. This circuit is equivalent to a**

A) k bit binary up counter

B) k bit binary ring counter

C) k bit binary down counter

D) k bit binary Johnson counter

**Q3.Consider the circuit in the diagram. The ⊕ operator represents EXOR. The D flipflops are initialized to zeroes (cleared).The following data: 100110000 is supplied to the “data” terminal in nine clock cycles. After that the values of q2q1q0 are**

A) 000

B) 001

C) 010

D) 101

**Q4. In an SR latch made by cross-coupling two NAND gates, if both S and R inputs are set to 0, then it will result in**

A) Q=0 and Q'=1

B) Q=1 and Q'=0

C) Q=1 and Q'=1

D) Invalid states

**Q5. Consider the partial implementation of a 2-bit counter using T flip-flops following the sequence 0-2-3-1-0, as shown below.To complete the circuit, the input X should be**

A) Q2'

B) Q2+Q1

C) (Q1 xor Q2)'

D) Q1 xor Q2

**Q6. The minimum number of JK flip-flops required to construct a synchronous counter with the count sequence (0, 0, 1, 1, 2, 2, 3, 3, 0, 0,...) is**

A) 0

B) 1

C) 2

D) 3

**Q7. How many pulses are needed to change the contents of a 8-bit up counter from 10101100 to 00100111 (rightmost bit is the LSB)?**

A) 134

B) 123

C) 124

D) 133

**Q8. We want to design a synchronous counter that counts the sequence 0-1-0-2-0-3 and then repeats. The minimum number of J-K flip-flops required to implement this counter is**

A) 1

B) 2

C) 5

D) 4

**Q9. Design a synchronous counter to go through the following states: 1, 4, 2, 3, 1, 4, 2, 3, 1, 4,...**

**Q10. Design a synchronous counter to go through the following states: 0->1->3->4->5->7->0..using T flip flop.**

**Q11. Which of the following input sequences for a cross-coupled R-S flip-flop realized with two NAND gates may lead to an oscillation ?**

A) 11,00

B) 01,10

C) 10,01

D) 00,11

**Q12. The Boolean function f implemented in the figure shown below, using two input multiplexers is.**

A) AB'C+ABC'

B) A'B'C+A'BC'

C) A'BC+A'B'C'

D) ABC+AB'C'

**Q13. The functional difference between SR flip-flop and JK flip-flop is that**

A) JK flip flop is faster than SR flip flop

B) JK flip flop has a feedback path

C) JK flip flop accepts both inputs 1

D) None of the above

**Q14. A modulus 12 ring counter requires a minimum of flip flops.**

A) 10 flip flops

B) 12 flip flops

C) 6 flip flops

**Q15. In a three stage counter, using RS flip flops what will be the value of the counter after giving 9 pulses to its input? Assume that the value of counter before giving any pulses is 1**

A) 1

B) 2

C) 9

D) 10

**Q16. The number of flip-flops required to design a modulo 272 counter is:**

A) 8

B) 9

C) 27

D) 11

**Q17. Ring counter is analogous to**

A) Latch

B) Toggle switch

C) Stepping switch

D) SR flip flop

**Q18. How many 3-to-8 line decoders with an enable input are needed to construct a 6-to-64 line decoder without using any other logic gates?**

A) 7

B) 8

C) 9

D) 10

**Q19. A ROM is used to store the table for multiplication of two 8-bit unsigned integers. The size of ROM required is**

A) 256 x 16

B) 64K x 8

C) 4K x 16

D) 64K x 16

**Q20. Consider the equation (123)5 = (x8)y with x and y as unknown. The number of possible solutions is**

A) 1

B) 2

C) 3

D) 4

**Q21. The 2’s complement representation of (−539)10 in hexadecimal is**

A) ABE

B) DBC

C) DE5

D) 9E7

**Q22. Consider the equation (43)x = (y3)8 where x and y are unknown.The number of possible solutions is**

A) 3

B) 4

C) 5

D) 6

**Q23. The number of 1's in the binary representation of (3*4096 + 15*256 + 5*16 + 3) are**

A) 9

B) 8

C) 10

D) 12

**Q24. The number of 1's in the binary representation of (4*4096 + 9*256 + 7*16 + 5) are**

A) 9

B) 8

C) 10

D) 12

**Q25. Which one of the following expressions does NOT represent exclusive NOR of x and y?**

A) xy+x'y'

B) x xor y'

C) x' xor y

D) x' xor y'

**Q26. What is the minimum number of gates required to implement the Boolean function (AB+C)if we have to use only 2-input NOR gates?**

A) 2

B) 3

C) 4

D) 5

**Q27. The total number of prime implicants of the function f(w, x, y, z) = Î£(0, 2, 4, 5, 6, 10) is**

A) 2

B) 3

C) 4

D) 5

**Q28. What is the minimum number of NAND gates required to implement a 2-input EXCLUSIVE-OR function without using any other logic gate?**

A) 3

B) 4

C) 5

D) 6

**Q29. Logic family popular for low power dissipation.**

A) ECL

B) CMOS

C) TTL

D) DTL

Hello sir,

ReplyDeleteCan you post the answers if it possible

Ok I will post..

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