ATPG Basic Tool Flow

ATPG Basic Tool Flow The below figure shows the basic process flow for the ATPG tool. ATPG Basic Tool Flow 1.  Invoke Tessent Shel...

DFT Flow Using Tessent

DFT Flow Using Tessent Tool DFT Flow Using Tessent Shell Design Loading: Set Context Read the Libraries Read the Design Elaborate...

DFT Profile Interview Questions Part 3

1.  The total number of multiple stuck-at faults possible in a 3-input NAND gate is. a) 27 b) 81 c) 80 d) None of the above Solu...

DFT Profile Interview Questions Part 2

1. With a multiple fault model with k types of faults, a circuit with n fault sites will have number of  faults equal to. a) (k+1)^n b...

Testing of VLSI Circuits

Why do we need testing? Fabrication process are becoming more and more complex ,design are coming closer  together and becoming smalle...

Memory Built In Self Test (MBIST) Basic Concepts

What is Built In Self Test (BIST)? BIST is a design-for-testability technique that places the testing functions physically with the circ...

Design for Testability (DFT) Basic Concepts

What is Design for Testability (DFT)? DFT is a technique that makes test generation and test application easier and cost effective. In...

DFT Profile Interview Questions Part 1

In this post I am writing some generally asked questions for DFT profile. Q1 . What is Fault Coverage? Q2. What is test coverage? Q3....