DFT Flow Using Tessent

DFT Flow Using Tessent Tool

DFT Flow Using Tessent Shell

Design Loading:

• Set Context
• Read the Libraries
• Read the Design
• Elaborate the Design
• Report the Design Data

Specify and Verify DFT Requirements:

• Set DFT Specification Requirements
• Add Properties and Constraints
• Define Clock
• Run DRC

Create DFT Specification:

• Invoke create_dft_specification
• Edit/Configure the DFT Specification According to Your Requirements
• Validate the DFT Specification

Process DFT Specification:

• Create DFT Hardware with the DFT Specification

Extract ICL

• Preparation for Pattern Generation

Create Patterns Specification

• Automatically Created Patterns Specification
• Edit/Configure the Patterns Specification According to Your Requirements

Process Patterns Specification

• Process Patterns According to the Patterns Specification

Run and Check Test Bench Simulations

• Run Simulations
• Check Results
• Formal Verification

Test Logic Synthesis

• RTL Design Flow Synthesis
• Gate Level Design Flow Synthesis

Design Flow Dofile Example: A sample dofile in this section shows you how to set up a design flow.
Design Loading
set_context dft -rtl
read_cell_library ../library/adk.tcelllib
set_design_sources -format verilog -y {../library/mem ../design/rtl} \
-extension v
set_design_sources -format tcd_memory -y ../library/mem -extension lib
read_verilog ../design/rtl/blockB.v
set_current_design blockB
Specify and Verify DFT Requirements
set_design_level physical_block
set_dft_specification_requirements -memory_test on
add_clocks CLK -period 10ns -label clkb
check_design_rules
Create DFT Specification
set spec [create_dft_specification]
report_config_data $spec
Process DFT Specification
process_dft_specification
Extract ICL
extract_icl
Create Patterns Specification
create_patterns_specification
Process Patterns Specification
process_patterns_specification
Run and Check Test Bench Simulations
run_testbench_simulations
check_testbench_simulations
Test Logic Synthesis
run_synthesis

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vlsi4freshers

Hi I’m Designer of this blog.