1.Code coverage is specification coverage, while functional coverage is implementation coverage. a) TRUE b) FALSE 2. Which of the fo...
Showing posts with label System Verilog. Show all posts
Showing posts with label System Verilog. Show all posts
System Verilog Interview Questions Part 2
1.What is default value of logic data type? a)x b)0 c)1 d)z 2.Which of the following data types is not 2 state data types? a)i...
Verification Profile Interview Questions
1. Which of the following data-types is new in System Verilog? a)Integer b)Logic c)Time d)None of the above Answer: option b 2...
System Verilog Interview Questions Part 1
In this post I am writing some frequently asked System Verilog Interview Q uestions Q1. What is the difference between logic and bit i...
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