1.What is default value of logic data type?
a)x
b)0
c)1
d)z
2.Which of the following data types is not 2 state data types?
a)int
b)bit
c)byte
d)logic
3.What is default size of string data type in system verilog?
a)no limit
b)simulator dependent
c)32 bit
d)32 byte
4.Which of the following keyword is used to declare user defined data types?
a)event
b)enum
c)semaphore
d)typedef
5.Which of the following enum declaration is correct?
a)enum {Rahul=1,Rohit=2,Naveen,Kumar=3}Name;
b)a)enum {Rahul=1,Rohit=2,Naveen=2,Kumar=3}Name;
c)a)enum {Rahul=1,Rohit=2,Naveen,Kumar=4}Name;
d)All of the above
6.Which of the following statement is incorrect?
a)Packed array is guaranteed to be represented as contiguous set of bits.
b)Unpacked array may or may not be represented as contiguous set of bits.
c)Unpacked array may be declared by specifying size after the variable.
d)None of these.
7.At what time ,Process-5 will be printed?
fork
begin
$display($time,"Process-1");
#5
$display($time,"Process-2");
end
begin
#10
$display($time,"Process-3");
#20
$display($time,"Process-4");
end
join_any
$display($time,"Process-5");
a)5
b)0
c)10
d)25
8.System verilog tasks allows:
a)defaults arguments type is logic if no type has been specified.
b)multiple statements within task without requiring a begin ..end or fork..join.
c)to declare automatic variable in static task and static variable in automatic task.
d)All of the above.
9.System verilog functions allows:
a)function output an inout ports
b)Any expression can be used as function call argument.
c)A function without a range or return type declaration return a one bit value.
d)All of the above
10.Modport is used to
a)to declare input and output skew
b)declare directions of signals
c)to synchronize signals
d)make interface complex
11.Which of the following satisfies repetition operator in system verilog assertions?
a)property p;
@(posedge clk) a|->##1 b ##1 b ##1 b;
endproperty
a:assert property(p);
b)property p;
@(posedge clk) a|->##1 b[*3];
endproperty
a:assert property(p);
c)property p;
@(posedge clk) a|->##1 b[->3] ##1 c;
endproperty
a:assert property(p);
d)Both a and b
12.What will be randomizing result of following code?
class packet;
rand bit[3:0] addr;
endclass
class packet2 extends packet;
constraint addr_range{addr <5;}
endclass
module const_inhe;
intial begin
packet pkt1;
packet2 pkt2;
pkt1=new();
pkt2=new();
repeat(2) begin
pkt1.randomize();
$display("\tpkt2 :: addr=%0d",pkt2.addr);
end
end
endmodule
a)pkt2=4,
pkt2=3
b)pkt2=x,
pkt2=x
c)pkt2=0,
pkt2=0
d)runtime error
13.What will be the output of following code?
class packet;
bit[31:0] addr;
static bit[31:0] id;
function display(bit[31:0]a,b);
$display("values are %0d %0d",a,b);
endfunction
endclass
module sro_class;
int id=10;
initial begin
packet p;
p=new();
packet::id=20;
p.display(packet ::id,id);
end
endmodule
a)20,10
b)10,20
c)Syntax error
d)Uninitialized arguments.
14.What will be the output of following code?
initial begin
function void current_time;
$display("\tcurrent simulation is %0d",$time);
endfunction
#10;
current_time();
end
a)message will get printed after 10ns
b)compile error
c)run time error
d)None of the above
15.In associative array, how to check if elements exists at specified index?
a)Using array querying method.
b)Using array ordering method.
c)Using queue
d)None of the above
16.How to increase the size of dynamic array by retaining its old values?
int d_array[];
d_array=new[5];
a)d_array=new[10] d_array;
b)d_array=new[10];
c)Both a and b
d)None of the above
17.Which of the following statement is true?
a)In case of unique if,there will be error if more than one condition is true.
b)In case of unique if,there will be error if no condition is true.
c)In case of priority if,there will be error if no condition is true.
d)All of the above
18.Wire can be driven by multiple drivers.
a)True
b)False
19.Which of the following is the declaration for a queue?
a)int a[$];
b)int a[];
c)int a;
d)None of the above
20.How to disable randomization of particular variable in a class?
a)by setting rand_mode of particular variable to '0'
b)by setting constraint_mode to '0'
c)by avoiding randomization
d)by constraining particular variable to '0'
Answers: 1.a 2.d 3.a 4.d 5.c 6.d 7.a 8.d 9.d 10.b 11.d 12.c 13.a 14.b 15.d 16.a 17.d 18.a 19.a 20.a
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