Qualcomm Interview Questions Part 3

1. Which one of the given options is the same as NOT-AND gate?
a) EXNOR
b) NOR
c) NAND
d) NOT
2. Which one of the given options is the correct reduced expression for the below given?
(P+Y).(P'+Y')
a) 0
b) Y
c) P
d) P'+Y
3. Convert the following decimal value into binary value : 11210=()2?
a) (0000011)2
b) (0011011)2
c) (1110000)2
d) (0001100)2
4. Which one of the given options is the minimum number of AND gates required for the below given?
PZ+NZ
a) 0
b) 1
c) 2
d) 3
5. What will be the value produced if the number given below is left shifted once?
11010011
a) 10100110
b) 11100110
c) 10100111
d) 00110110
6. Find Qn+1 of the circuit .
a) XQ'+(X+Q)
b) X'Q'+XQ
c) X+Q
d) XQ
7. The instruction MOV AX, [CX] indicates which type of addressing mode?
a) Direct addressing mode
b) Register indirect addressing mode
c) Immediate addressing mode
d) Register relative addressing mode
8. An intrinsic semiconductor is 7 mm long and has a cross section 20 x 50 µm. If the value of steady state current is 1.5 μA and p is of 3.11 g/m², then calculate the value of voltage across the bar at 300K.
a) 17.091 kV
b) 23.973 kV
c) 32.655 kV
d) 44.515 kV
9. Estimate the delay through 250KOhm resistor made using n-well with a width of 10 and length of 500 assume that the capacitance of 10/10 square of n-well to substrate is 5fF.
a) 11 nS
b) 20 nS
c) 220 nS
d) 18 nS
10. In an operational amplifier circuit, the maximum frequency for the undistorted input is 100 KHz for 10 volts p-p output because of finite slew rate of the OPAMP. The maximum frequency for undistorted output of 5 volts p-p.
a) Will be  approx 100 KHz
b) Will be less than 100 KHz
c) Will be more than 100 KHz
d) Cannot be determined
11. Find out the number of 8:1 MUX required to realize a 32:1 MUX.
a) 4
b) 5
c) 6
d) 8
12. A linearly graded junction diode has initial transition capacitance of value 2 pF. Now the diode has been connected in reverse bias at 5V then its capacitance will be:
a) 1.107 pF
b) 1 pF
c) No change in Capacitance
d) 0.81 pF
13. For the self bias circuit shown below, find the value of RE if Ic>>lB and VCE = 10V, l=1mA.
a) 2K
b) 5K
c) 3K
d) 4K
14. A Dynamic RAM with a storage capacitance 1uF which can hold a charge of 10uC is refreshed every 12.5msec. What is the discharge current and the voltage of the capacitor?
a) I=0.8 mA and V =10V
b) I= 1 mA and V=5V
c) I= 1.25 mA and V= 12V
d) I= 1 mA and V=6V
15. Find the output of the flipflop with input J and K J=J1J2J3 and K=K1K2K3 initially Q=0 assume:
J1=1011011  J2=0111010  J3=1111000
K1=0001110  K2=1101100  K3=1010101
a) 0010110
b) 0011000
c) 0110110
d) 0110010
16. What is the activation energy for a semiconductor at high temperature if its energy is 1.3 eV?
a) 1.3 eV
b) 1.69 eV
c) 2.6 eV
d) 0.65 eV
17. A mod 50 counter can be implemented using:
a) 5 mod-10 counters
b) 10 mod-5 counters
c) 10 mod-10 counters
d) Mod-10 counter followed by mod-5 counter
18. Consider the Boolean equation given below:
F=ABCD'+A'B'CD+AB'C'D+A'B'C'D'
Write a minimal sum-of-products expression (with out dont cares) for F using Karnaugh map?
a) A'B'+A'B'C'D'+CD
b) A'B'+AB'C'D+ABCD'
c) A'B'+AB'C'D'+ABCD'
d) AB'+A'B'C'D'+CD
19. What is the SNR of a 16 bit ADC?
a) 75
b) 86 
c) 98
d) 67
20. In VLSI Design the connection of paths through a circuit is called its
a) Topology
b) Abstraction
c) Artificial Intelligence
d) Constraints
21. In 8086, if data stored in AX register in 03H then what will be the content of AX register after executing following instructions.
or AX, 09H
and AX, AAH
xor AX, FFH
neg AX
not AX
a) FCH
b) F5H
c) F4H
d) 03H
22. If the input voltage applied (V) is 5sin(100t).Which of the given option best suits the following circuit?
a) Negative half clipper
b) Positive half clipper
c) Positive half clamper
d) None of the above
23. The circuit shown below is used as:
a) Full adder
b) Half adder
c) Full subtractor
d) Half subtractor
24.Consider the DRAM cell shown below. If IL=1 nA, Cs=50 fF and the difference of Vs is 1 V. Find the hold time.
a) 0.5 usec
b) 0.5 msec
c) 0.25 msec
d) 0.25 usec
25. Determine Xn+1 and Yn+1 from the below circuit.
a) Yn'Xn'+Xn'Yn' and Xn'Y'n+Xn+Yn
b) YnXn'+XnYn and Xn+XnYn
c) YnXn' and Xn'Yn'+XnYn
d) Xn'Yn' and Xn'+XnYn'
26. A mod-6 gray counter is initialized with (Q2Q1Q0) 011 . Find out its output after 87 clock pulses.
a) 000
b) 010
c) 110
d) 111
27. What is the value Y for the following arithmetic circuit?
a) A AND B
b) A XOR B
c) A NAND B
d) A OR B
28. Determine the output frequency of carry/borrow output for up/down counting by 74193, 4 bit updown counter with present input of 1011 and input clock frequency is 550Hz.
a) 50, 137.5
b) 40, 108.5
c) 137, 48.5
d) 231.5, 38
29.  Calculate the switching time of CMOS NAND gate which has tPLH=25 ns and is driving 7 other NAND gates.
a) 87 ns
b) 31 ns
c) 46 ns
d) 57 ns
30. What should the concentration of donor atoms (approximately) added to silicon crystal be to produce a current of 10mA, connected with a battery of 10V, at room temperature? The cross section area and length of the crystal are 1 x 10^-6 m2 and 40μm. Assume un = 1200, q = 1.6 x 10^-19 C.
a) 6.25 x 10^12 m-3
b) 1.45 x 10^-8 cm-3
c) 1.4 x 10^8 m-3
d) 2.08 x 10^14 m-3
31. The valence band and conduction band energies for Si Semiconductor are 0.68 eV and 1.62 eV. What is the Fermi level of the intrinsic semiconductor, if the effective density of states at valence band minimum and conduction band minimum are 4 x 10^12 cm-3 and 1 x 10^10 cm-3, k = 8.61 x 10^-5 eV/K and T = 300K.
a) 1.23 eV
b) 1.1 eV
c) 2.38 eV
d) 1.69 eV
32. What is the average value of Vo over the time 0 to T?
a) -5.76V
b) -8.75V
c) -3.81V
d) -6.93V
33. Calculate the value of voltage gain of the following circuit by assuming Rin=2 kΩ.
a) 28.125
b) 42.192
c) 64.982
d) 83.442
34. Below figures shows a practical oscillator circuit. Find out the frequency of oscillation by considering the value  R1=3 MΩ ,R2= 2 MΩand C=0.35 uF.
a) 107.21 MHz
b) 385.81 MHz
c) 556.95 MHZ
d) 732.18 MHz
35. For a monostable multivibrator using IC 555 timer R=100K C=0.01 uF. Input signal is having 50% duty cycle with f=1 KHz .Determine the output signal frequency.
a) 680 Hz
b) 500 Hz
c) 171 Hz
d) 345 Hz
36. EBCDIC (Extended Binary Coded Decimal Interchange Code) is a/an:
a) 8 bit character encoding
b) 7 bit character encoding
c) 4 bit character encoding
d) 10 bit character encoding
37. Identify the following circuit type:
a) pMOS NAND gate
b) pMOS NOR gate
c) nMOS NAND gate
d) nMOS NOR gate
38. Identify which of the keeper circuit is this (shown below):
a) Conventional keeper
b) Differential keeper
c) Burn-in conditional keeper
d) Adaptive keeper
39. What is the size of the index register of a motorola 6800 microprocessor?
a) 1 byte
b) 2 byte
c) 3 byte
d) 4 byte
40. How many 4-input LUTs are needed to design a 6-input LUT?
a) 4
b) 3
c) 6
d) Not possible to implement 6-input LUTs with 4-input LUTs
41. Low development costs and high speed of operation can be obtained when using:
a) CISC systems
b) RISC systems
c) Von Neumann Architecture
d) Both RISC and CISC systems
42. Find out the total delay in the below program by considering crystal frequency of 11.3456 MHz.
MOV R1, #180
START:NOP
NOP
DJNZ R1,START
RET
a) 24.9821 us
b) 63.6963 us
c) 97.8361 us
d) 165.4472 us
43. Find out the required gate at position 1 and 2.

a) XOR gate at position 1 and AND gate at position 2
b) XOR gate at position 1 and OR gate at position 2
c) XNOR gate at position 1 and AND gate at position 2
d) XNOR gate at position 1 and OR gate at position 2 
44. Which one of the given options is the correct decimal representation of the below given binary number?
1011011111011
a) 5262
b) 8385
c) 5883
d) 2568
45. For an enhancement type MOSFET, constant k = 0.5 mA/V². ID(on) is given as 12 mA and threshold voltage Vt is given as 3V. VGS(on) has a value of V1. When VGS(on) is changed to 1.5V1 what is the value of ID (on) if the constant k and Vt retain their values?
a) 18 mA
b) 36 mA
c) 39.14 mA
d) 47.56 mA
46. How many flip-flops are required to design a divide by 64 device?
a) 5
b) 6
c) 7
d) 8
47. Find the count value to be loaded into CX register to generate a delay of 100 ms using 8086 running on 10 MHz.
MOV EX, count
Label: DEC CX
NOP
JNZ label 
a) D3B0 H
b) C0A4 H
c) BA03 H
d) A30F H
48. Find out output sequence (f) if the following input sequences are applied.
a) 0001
b) 0011
c) 0111
d) 1111
49. Find the body effect parameter (y) of a Silicon NMOSFET, if doping concentration (NA) is 10^17 cm-3, thickness of the silicon oxide layer is (tox) = 15nm.
a) 0.50 V^-1/2
b) 0.78 V^-1/2
c) 1.78 V^-1/2
d) 1.50 V^-1/2
50. A RLC series circuit designed to achieve unity power factor. The series circuit is connected to a 110V, 50Hz supply. The circuit dissipates a power of 50W. What is the value of capacitor if the voltage across the resistor is 50V?
a) 32.5 mF
b) 32.5 microF
c) 0.325 microF
d) 50 mF
51. In fibre optic communication the signal transmitted through fibre is in the form of:
a) Analog signal
b) Discrete signal
c) Electric pulses
d) Light pulses
52. When the two capacitors(C₁,C₂) are connected together through a switch so as to form a loop, the value of common potential developed in the net combination of capacitors is given by which of the following relation? Where v1 and v2 are their respective potential.
a) V=(C1V1-C2V2)/C1+C2
b) V=(C1V1+C2V2)/C1-C2
c) V=(C1V1+C2V2)/C1+C2
d) V=(C1V1-C2V2)/C1-C2
53. If the propagation delay per gate is 12 nsec what is the frequency of oscillation for the circuit?
a) 27.78 MHz
b) 83.34 MHz
c) 55.56 MHz
d) 13.89 MHz
54. The CMOS realization of logic function F=(A+B)(A+C)+C' will require how many PMOS and NMOS MOS transistor?
a) 2,2
b) 3,3
c) 5,5
d) 7,7
55. For the microprocessor architecture shown what are the kinds of buses X and Y respectively?
a) Data and Control
b) Control and Data
c) Control and Address
d) Address and Data
56. Identity input code of the following circuit if the output code in BCD.
a) BCD Code
b) Gray Code
c) One hot Code
d) Excess-3 Code
57. For a MOSFET, the value of transconductance increases by 3 times due to variation in channel length of the MOSFET. If the original length was L, then what is the value of new length Lnew? Assume that the width is kept constant.
a) Lnew=3L
b) Lnew=L/3
c) Lnew=L/√3
d) Lnew=√3L
58. A common emitter amplifier has inductive load in series with load impedance. What will the phase difference between input and output?
a) 90
b) 270
c) 180<phase difference<270
d) 180
59. For a 3 level RTL combinational circuit the delay depends on
a) Delay depends only on Circuit topology (graph model)
b) Delay depends only on Boolean behavior of gates
c) Delay depends only on Boolean behavior of gates
d) Delay depends on all things like Circuit topology (graph model), Delay model (e.g., fixed vs. variable)and Boolean behavior of gates
60. A 4bit DAC gives a full-scale output of 10mA and the corresponding error being ±1%. What is the maximum analog output that may be obtained with this DAC for a digital input of 1100?
a) 8.8 mA
b) 8.1 mA
c) 8.0001 mA
d) 8.0008 mA
61. A resistor of 15Ω is connected in series with an inductor (L) and a current i(t) is found to be 2+3sin(100t+30°) + 5sin(100t+30°) amp. What will be the RMS value of current and power dissipated in the circuit?
a) √15, 300 watt
b) √10, 315 watt
c) √21, 315 watt
d) √21, 215 watt
62. Identify the type of gate required at "?" mark position to make it a mod-8 synchronous counter constructed from negative edge triggered T-types.
a) AND
b) OR
c) NAND
d) NOR
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